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Cypress Semiconductor /psoc63 /SRSS /MCWDT_STRUCT[1] /MCWDT_LOCK

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Interpret as MCWDT_LOCK

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NO_CHG)MCWDT_LOCK

MCWDT_LOCK=NO_CHG

Description

Multi-Counter Watchdog Counter Lock Register

Fields

MCWDT_LOCK

Prohibits writing control and configuration registers related to this MCWDT when not equal 0 (as specified in the other register descriptions). Requires at least two different writes to unlock. Note that this field is 2 bits to force multiple writes only. Each MCWDT has a separate local lock. LFCLK settings are locked by the global WDT_LOCK register, and this register has no effect on that.

0 (NO_CHG): No effect

1 (CLR0): Clears bit 0

2 (CLR1): Clears bit 1

3 (SET01): Sets both bits 0 and 1

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data